Evolution of Microprocessors

The journey of microprocessors began with the invention of the integrated circuit (IC) in the late 1950s. Early computers were massive, occupying entire rooms and using thousands of vacuum tubes or discrete transistors. The development of the IC, which could house multiple transistors on a single silicon chip, paved the way for miniaturization and increased processing power.

The first true microprocessor, the Intel 4004, was released in 1971. It was a 4-bit processor designed for a calculator company, Busicom. This single chip integrated the central processing unit (CPU) functions that previously required multiple chips. Its success spurred further development, leading to the 8008, the first 8-bit microprocessor, and then the highly influential Intel 8080 in 1974. The 8080 was a general-purpose 8-bit processor and became the heart of many early personal computers, such as the Altair 8800.

The 1970s and 1980s saw rapid advancements. Motorola's 6800 and Zilog's Z80 were popular alternatives to Intel's offerings. The transition to 16-bit processors, like the Intel 8086 (1978), marked a significant leap in performance and addressable memory. This was followed by the 80286, which introduced memory protection and multitasking capabilities. The introduction of the Intel 80386 in 1985 brought 32-bit processing to the mainstream, enabling more complex operating systems and applications.

The 1990s witnessed the rise of the Pentium series, further enhancing performance through techniques like pipelining and superscalar architecture. Clock speeds increased dramatically, moving from megahertz (MHz) to gigahertz (GHz). The advent of 64-bit processors towards the end of the 20th century and early 21st century, with processors like AMD's Athlon 64 and Intel's Itanium, allowed for addressing vastly larger amounts of memory and handling more complex data types.

Today, microprocessors are ubiquitous, found not only in personal computers and servers but also in smartphones, tablets, embedded systems, and countless other devices. They continue to evolve with advancements in transistor density (Moore's Law), multi-core architectures, improved power efficiency, and specialized processing units like GPUs (Graphics Processing Units) and NPUs (Neural Processing Units).

Organisation of Microcomputers

A microcomputer, commonly known as a personal computer (PC), is a complete computing system built around a microprocessor. Its organisation involves several key components working in concert to execute instructions and process data.

Central Processing Unit (CPU)

The CPU is the brain of the microcomputer. It fetches instructions from memory, decodes them, and executes them. Modern CPUs are complex microprocessors, often featuring multiple cores for parallel processing.

Memory

Microcomputers use different types of memory:

• RAM (Random Access Memory): This is volatile memory used to store programs and data that the CPU is currently working with. It allows for fast read and write access. Examples include DRAM (Dynamic RAM) and SRAM (Static RAM).
• ROM (Read-Only Memory): This non-volatile memory stores essential startup instructions, such as the BIOS (Basic Input/Output System) or UEFI (Unified Extensible Firmware Interface), which are needed to boot the computer.
• Cache Memory: A small, very fast memory located either on the CPU chip itself or very close to it. It stores frequently accessed data and instructions from RAM to reduce the time the CPU spends waiting for data. Levels include L1, L2, and L3 caches.
• Secondary Storage: Non-volatile storage for long-term data retention. This includes Hard Disk Drives (HDDs), Solid State Drives (SSDs), and optical drives.

Input/Output (I/O) Devices

These devices allow the computer to interact with the user and the external world.

• Input Devices: Keyboard, mouse, scanner, microphone, webcam.
• Output Devices: Monitor, printer, speakers, projector.

Motherboard

The motherboard is the main circuit board that connects all the components of the microcomputer. It houses the CPU socket, RAM slots, expansion slots (like PCIe), storage connectors (SATA, M.2), and various ports for I/O devices. It also contains the chipset, which manages data flow between the CPU, memory, and peripherals.

Buses

Buses are electrical pathways that connect different components, enabling them to communicate. They are typically categorized into:

• Address Bus: Carries memory addresses from the CPU to RAM and other devices, specifying where data should be read from or written to.
• Data Bus: Carries actual data between the CPU, memory, and I/O devices. It is bidirectional.
• Control Bus: Carries control signals and timing information from the CPU to other components, coordinating their operations. Examples include read/write signals, clock signals, and interrupt requests.

Power Supply Unit (PSU)

The PSU converts AC power from the wall outlet into the DC voltages required by the computer's components.

Basic Programming Concepts

Programming is the process of creating a set of instructions that a computer can understand and execute to perform a specific task. Understanding basic programming concepts is crucial for anyone working with microprocessors or computer systems.

Algorithms

An algorithm is a step-by-step procedure or a set of rules designed to solve a specific problem or perform a computation. It's like a recipe for the computer. Algorithms must be finite, well-defined, and effective.

Example: An algorithm to find the largest number in a list:

1. Start with the first number as the current largest.
2. Go through each remaining number in the list.
3. If a number is larger than the current largest, update the current largest to this new number.
4. After checking all numbers, the current largest is the answer.

Programming Languages

These are formal languages used to write instructions for computers. They have specific syntax and semantics.

• Machine Language: The lowest-level programming language, consisting of binary code (0s and 1s) directly understood by the CPU. It's extremely difficult for humans to read and write.
• Assembly Language: A low-level language that uses mnemonics (short abbreviations) to represent machine instructions. It's a symbolic representation of machine code and is specific to a particular processor architecture. An assembler translates assembly code into machine code.
• High-Level Languages: These languages (e.g., Python, Java, C++, C) are more human-readable and abstract away the hardware details. They use English-like keywords and structures. A compiler or interpreter translates high-level code into machine code.

Variables

Variables are symbolic names given to memory locations that store data. They can hold different values during program execution. Variables have a data type (e.g., integer, float, character) that defines the kind of data they can store and the operations that can be performed on them.

Data Types

Define the type of value a variable can hold and the operations that can be performed on it. Common data types include:

• Integers: Whole numbers (e.g., 10, -5, 0).
• Floating-point numbers: Numbers with decimal points (e.g., 3.14, -0.5).
• Characters: Single letters or symbols (e.g., 'A', '$').
• Booleans: Represent truth values (True or False).

Control Structures

These structures dictate the flow of execution in a program.

• Sequential Execution: Instructions are executed one after another in the order they appear.
• Selection/Conditional Statements: Allow the program to make decisions based on certain conditions (e.g., `if-else`, `switch`).
• Iteration/Looping Statements: Allow a block of code to be executed repeatedly (e.g., `for`, `while`, `do-while`).

Functions/Subroutines

A function (or subroutine) is a block of code that performs a specific task and can be called from different parts of the program. This promotes code reusability and modularity.

Microprocessor Architecture

Microprocessor architecture refers to the design and organisation of the internal components of a microprocessor and how they interact. A fundamental aspect is the Instruction Set Architecture (ISA), which defines the set of commands (instructions) the processor can understand and execute.

Key Components of a Microprocessor

Most microprocessors share common internal components:

• Arithmetic Logic Unit (ALU): Performs arithmetic operations (addition, subtraction) and logical operations (AND, OR, NOT).
• Control Unit (CU): Fetches instructions from memory, decodes them, and directs the other components of the processor and the computer system to execute them. It generates control signals.
• Registers: Small, high-speed memory locations within the CPU used to temporarily store data, instructions, and memory addresses that are actively being processed. Key registers include:
  • Program Counter (PC): Holds the address of the next instruction to be fetched.
  • Instruction Register (IR): Holds the current instruction being decoded and executed.
  • Accumulator: A general-purpose register often used to store intermediate results of ALU operations.
  • General-Purpose Registers: Used for temporary storage of data and addresses during program execution.
  • Memory Address Register (MAR): Holds the address of the memory location to be accessed.
  • Memory Data Register (MDR): Temporarily holds data being transferred to or from memory.
• Clock: Generates timing pulses that synchronise all operations within the CPU and the system. The clock speed, measured in Hertz (Hz), determines how many cycles the processor can perform per second.

Instruction Execution Cycle (Fetch-Decode-Execute)

The CPU executes instructions in a continuous cycle:

1. Fetch: The Control Unit fetches the next instruction from memory, whose address is stored in the Program Counter (PC). The fetched instruction is loaded into the Instruction Register (IR). The PC is then incremented to point to the next instruction.
2. Decode: The Control Unit decodes the instruction in the IR to determine what operation needs to be performed and what operands (data or addresses) are involved.
3. Execute: The Control Unit directs the appropriate components (e.g., ALU, registers) to perform the operation specified by the instruction. This might involve fetching data from memory, performing calculations, or writing data back to memory.

This cycle repeats for every instruction in a program. Pipelining is a technique used to improve performance by overlapping these stages for different instructions.

RISC vs. CISC Architecture

Microprocessors are broadly categorized based on their instruction set architecture:

• CISC (Complex Instruction Set Computer): Processors with a large and varied set of instructions, some of which can perform complex operations in a single step. Examples include Intel x86 processors. CISC aims to reduce the number of instructions per program.
• RISC (Reduced Instruction Set Computer): Processors with a smaller, simpler, and highly optimised set of instructions. Instructions are typically fixed-length and execute in a single clock cycle. Examples include ARM processors used in many mobile devices. RISC aims to simplify the hardware design and improve execution speed per instruction.

Address, Data, and Control Buses

Buses are the communication pathways that connect the CPU to other components like memory and I/O devices. They are essentially groups of wires that carry electrical signals.

Address Bus

The address bus is a unidirectional pathway that carries memory addresses from the CPU to memory or I/O devices. When the CPU needs to read data from or write data to a specific location, it places the address of that location onto the address bus.

• Width of the Address Bus: The number of lines in the address bus determines the maximum amount of memory the CPU can directly address. If an address bus has 'n' lines, it can generate 2ⁿ unique addresses.
  • For example, an 8-bit address bus can address 2⁸ = 256 memory locations.
  • A 16-bit address bus can address 2¹⁶ = 65,536 (64 KB) locations.
  • A 32-bit address bus can address 2³² = 4 GB (Gigabytes) of memory.
  • A 64-bit address bus can address 2⁶⁴ bytes, an astronomically large amount.
• Unidirectional: The CPU is the source of addresses, so the address bus carries signals only from the CPU outwards.

Data Bus

The data bus is a bidirectional pathway that carries data between the CPU and memory or I/O devices. When the CPU reads data from memory, it travels from memory to the CPU via the data bus. When the CPU writes data to memory, it travels from the CPU to memory via the data bus.

• Width of the Data Bus: The number of lines in the data bus determines how much data can be transferred at once. It's often referred to as the "word size" of the processor.
  • An 8-bit data bus can transfer 8 bits (1 byte) of data at a time.
  • A 16-bit data bus can transfer 16 bits (2 bytes) at a time.
  • A 32-bit data bus can transfer 32 bits (4 bytes) at a time.
  • A 64-bit data bus can transfer 64 bits (8 bytes) at a time.
• Bidirectional: Data can flow in both directions between the CPU and other components.

Control Bus

The control bus carries timing and control signals from the Control Unit of the CPU to various components of the system. These signals manage and coordinate the activities of the entire system.

• Key Control Signals:
  • Read/Write (R/W) Signal: Indicates whether the current operation is a memory read or a memory write.
  • Memory Enable (MEM EN) / I/O Enable (IO EN): Signals to select whether the operation is directed towards memory or an I/O device.
  • Clock Signal: Synchronises operations across the system.
  • Interrupt Request (IRQ): Signals from I/O devices to the CPU requesting attention.
  • Reset Signal: Initialises the system to a known state.
  • Bus Request/Grant: Signals used for bus arbitration, allowing multiple devices to share the bus.
• Unidirectional and Bidirectional: Some control signals are unidirectional (e.g., from CPU to memory), while others can be bidirectional (e.g., interrupt requests from devices to the CPU).

Memory Decoding

Memory decoding is the process of selecting a specific memory chip or a specific location within a memory chip that the CPU wants to access. When the CPU places an address on the address bus, a decoder circuit interprets this address to activate the correct memory chip and the correct internal memory location.

Why is Decoding Necessary?

A computer system typically contains multiple memory chips (e.g., for RAM, ROM) and various I/O devices. Each chip or device occupies a range of addresses. The CPU needs a way to pinpoint exactly which device and which location within that device it wants to communicate with. The address bus contains the full address, but this needs to be translated into specific chip select signals.

Types of Memory Decoding

There are two primary methods for memory decoding:

1. Full Decoding: In full decoding, all the address lines are used to generate a unique chip select signal for each memory chip. This ensures that each memory chip is selected only when its specific address range is present on the address bus. This method avoids address conflicts and wastes fewer address lines.

   Example: Suppose we have a system with two 256-byte memory chips (Chip A and Chip B) and an 11-bit address bus (A0-A10). Chip A uses addresses 00000000000 to 01111111111 (0 to 255), and Chip B uses 10000000000 to 11111111111 (256 to 511). To select Chip A, we need the most significant bit (A10) to be 0. To select Chip B, A10 must be 1. The lower 8 bits (A0-A7) would then be used by the memory chip itself to select one of its 256 locations.

2. Partial Decoding: In partial decoding, only a subset of the address lines is used to generate chip select signals. This is simpler to implement but can lead to "address mirroring," where a single memory chip responds to multiple address ranges. This wastes memory addresses and can cause conflicts if not managed carefully.

   Example: If only address line A10 is used to select between two chips, and A10=0 selects Chip A and A10=1 selects Chip B, but the other higher address lines are not considered, then Chip A might respond to addresses like 0xxx... and also 1xxx... if A10 is not decoded properly. This creates multiple copies of the same memory range.

Decoder Circuits

Decoder circuits, often implemented using logic gates (like AND, NAND gates) or dedicated decoder ICs (e.g., 74LS138 3-to-8 decoder), are used to perform memory decoding. They take a set of address lines as input and generate specific output signals (chip select signals) that enable or disable memory chips.

Memory-Mapped I/O and I/O-Mapped I/O

Microprocessors need to communicate with peripheral devices (like keyboards, displays, printers) as well as memory. There are two main schemes for handling this I/O communication: Memory-Mapped I/O and I/O-Mapped I/O (also known as Port-Mapped I/O).

Memory-Mapped I/O

In this scheme, I/O devices are treated as if they were memory locations. The I/O devices are assigned addresses within the same address space as the main memory.

• Unified Address Space: Memory and I/O devices share the same address bus and the same set of control signals (like read/write).
• Instructions Used: The CPU uses the same set of instructions to access both memory and I/O devices (e.g., `MOV` - move data, `LOAD`, `STORE`).
• Address Decoding: The address decoder must distinguish between memory addresses and I/O device addresses. Some address lines might be dedicated to selecting I/O devices, while others select memory.
• Advantages: Simpler instruction set for I/O operations, flexibility in assigning addresses.
• Disadvantages: Reduces the amount of address space available for memory. The I/O device must respond to memory read/write commands.

Example: A parallel port might be assigned an address range from 8000H to 8003H. A command to write to memory address 8001H would actually send data to the parallel port's data register.

I/O-Mapped I/O (Port-Mapped I/O)

In this scheme, I/O devices have a separate address space distinct from the memory address space. This means there are separate address buses or dedicated control signals to differentiate between memory access and I/O access.

• Separate Address Spaces: Memory has one address space, and I/O devices have another, often smaller, address space called "ports."
• Dedicated I/O Instructions: The CPU uses special I/O instructions (e.g., `IN`, `OUT` in x86 architecture) to communicate with I/O devices. These instructions signal to the system that an I/O operation is taking place.
• Control Signals: Separate control signals, such as `IO/M` (I/O or Memory), are used to indicate whether the address bus refers to a memory location or an I/O port.
• Advantages: Full address space available for memory. I/O devices are not confused with memory locations.
• Disadvantages: Requires special I/O instructions, which can make the instruction set more complex. Less flexibility in addressing I/O devices compared to memory-mapped I/O.

Example: In an x86 system, memory might be addressed from 0 to 0FFFFFH, while I/O ports are addressed from 0 to 03FFH. An `OUT 02H, AL` instruction would send the contents of the AL register to I/O port 02H, not to memory address 02H.

Machine and Instruction Cycles

To execute a program, the microprocessor performs a series of operations. These operations are broken down into fundamental cycles.

Machine Cycle

A machine cycle is the basic time unit in which the microprocessor performs one fundamental operation, such as fetching an instruction, reading data from memory, or writing data to memory. It consists of a sequence of clock cycles. The duration of a machine cycle can vary depending on the operation being performed and the processor's speed.

A machine cycle typically involves several steps coordinated by the control unit and synchronised by the system clock. For example, a memory read machine cycle might involve:

1. Placing the memory address on the address bus.
2. Asserting the memory read control signal.
3. Waiting for the memory to retrieve the data.
4. Reading the data from the data bus.

Instruction Cycle

An instruction cycle is the complete sequence of operations required to fetch, decode, and execute a single instruction from memory. It is composed of one or more machine cycles.

The typical stages of an instruction cycle are:

1. Fetch Cycle: The microprocessor fetches the instruction from the memory location indicated by the Program Counter (PC). This involves one or more machine cycles.
2. Decode Cycle: The fetched instruction is decoded by the Control Unit to determine the operation to be performed and the operands involved. This might involve reading operands from registers or memory. This stage also typically involves machine cycles.
3. Execute Cycle: The actual operation specified by the instruction is performed. This could involve arithmetic or logic operations by the ALU, data transfers, or control flow changes. This stage can involve one or more machine cycles depending on the complexity of the instruction.
4. Write-back Cycle (Optional): In some architectures, the result of the execution is written back to a register or memory. This is also part of the execution phase and involves machine cycles.

The total time taken for an instruction cycle is the sum of the machine cycles required for each stage. Processors often use techniques like pipelining to overlap instruction cycles, improving overall throughput.

Addressing Modes

Addressing modes define how the operand (the data or memory location that an instruction operates on) is specified in an instruction. Different addressing modes offer flexibility and efficiency in accessing data. Microprocessors support various addressing modes to suit different programming needs.

Here are some common addressing modes:

1. Immediate Addressing: The operand is part of the instruction itself. It's a constant value embedded directly in the instruction code.

   Example: `MOV AX, 5` (Move the value 5 into register AX). Here, 5 is the immediate operand.

2. Register Addressing: The operand is located in a CPU register. The instruction specifies which register holds the data.

   Example: `MOV AX, BX` (Move the contents of register BX into register AX).

3. Direct Addressing (Absolute Addressing): The instruction specifies the full memory address of the operand. The CPU directly accesses that memory location.

   Example: `MOV AX, [1000H]` (Move the data from memory address 1000H into register AX).

4. Indirect Addressing: The instruction specifies a register that contains the memory address of the operand. The CPU first fetches the address from the register and then uses that address to access the operand in memory.

   Example: `MOV AX, [BX]` (Move the data from the memory address stored in register BX into register AX).

5. Register Indirect Addressing: This is essentially the same as indirect addressing, emphasizing that the address is held within a register.
6. Indexed Addressing: The effective address of the operand is calculated by adding the contents of an index register (which holds a base address or offset) and a displacement (either immediate or part of the instruction). This is useful for accessing arrays.

   Example: `MOV AX, [BX + SI]` (Move data from memory address = content of BX + content of SI into AX). Here, BX holds a base address, and SI holds an offset within that base.

7. Based Indexed Addressing: Similar to indexed addressing, but uses a base register and an index register. The effective address is the sum of the contents of the base register and the index register.
8. Relative Addressing (PC-Relative Addressing): The effective address is calculated by adding the contents of the Program Counter (PC) to a displacement specified in the instruction. This is commonly used for jump and branch instructions, as the displacement is relative to the current instruction's location.

   Example: A `JMP LABEL` instruction might be encoded such that the address of `LABEL` is calculated as PC + displacement.

9. Implied Addressing (Implicit Addressing): The operand is implied by the instruction itself. No explicit operand is mentioned.

   Example: The `RRC` (Rotate Right through Carry) instruction operates on an implicit operand, often the Accumulator.