Basic Computer Organization and Design - stored program organization, instruction codes, computer registers, instruction cycle, timing and control, memory-reference instructions, input-output, interrupts - One Line Questions

1. What is a 'micro-operation' in the context of the instruction cycle? — A basic operation performed by hardware components, like moving data between registers or performing an ALU operation.
2. A 'bus' in computer organization refers to: — A set of wires or pathways used for data and control signal transfer.
3. In a fixed-length instruction format, what is a common challenge? — Accommodating a wide range of opcodes and addresses efficiently.
4. What is a common example of a 'memory-reference instruction'? — ADD (add contents of a register to memory)
5. The instruction 'ADD M' (Add content of memory to Accumulator) is an example of: — A memory-reference instruction
6. Instructions like 'LOAD' and 'STORE' are classified as: — Memory-reference instructions
7. Which type of instruction typically modifies the flow of program execution, such as branching or jumping? — Control flow instructions
8. Which type of instruction typically involves communication with peripheral devices? — Input/Output instructions
9. Which component is responsible for generating the sequence of control signals required to execute instructions? — Control Unit (CU)
10. Which component directly executes arithmetic and logical operations? — Arithmetic Logic Unit (ALU)
11. Which of the following is NOT a typical component of a basic computer organization? — Operating System
12. What is the typical sequence of events when an interrupt occurs? — CPU completes current instruction, saves state, jumps to interrupt handler, executes handler, restores state, resumes task.
13. What is the fundamental difference between a computer with 'stored program organization' and earlier machines? — Earlier machines had separate memory for instructions and data.
14. Which of these is a key challenge in designing the 'timing and control' unit for complex instruction sets? — Managing micro-operations for a wide variety of instructions and addressing modes.
15. In the instruction cycle, the 'operand fetch' is part of which main phase? — Execute
16. The 'instruction cycle' of a CPU typically consists of which two main phases? — Fetch and Execute
17. In a 'stored program' concept, what is the advantage of using a single memory for both instructions and data? — Flexibility in allocating memory space between programs and data.
18. An 'interrupt' is a signal that: — Causes the CPU to temporarily stop its current task and service a request.
19. What is the fundamental concept behind the 'stored program organization' in computer architecture? — Instructions and data share the same memory space and are fetched by the CPU.
20. What is the significance of the 'instruction format' in computer design? — It defines the layout of bits for opcode, addressing modes, and operands.
21. Which register typically holds the address of the next instruction to be fetched from memory? — Program Counter (PC)
22. Which register is often used to hold the data being transferred to or from memory? — Data Register (DR)
23. When the CPU fetches an instruction, it is typically placed into which register? — Instruction Register (IR)
24. What is the main difference between a memory-reference instruction and a register-reference instruction? — Memory-reference instructions access memory, while register-reference instructions operate on CPU registers.
25. In a basic computer, what is an 'instruction code' primarily composed of? — An operation code (opcode) and one or more operand addresses or modes.
26. A 'memory-reference instruction' is one that: — Accesses data or instructions from or to the main memory.
27. Which of the following is a typical 'computer register' used in a CPU? — Program Counter (PC)
28. The process of fetching an instruction from memory involves placing the instruction's address into which register? — Memory Address Register (MAR)
29. Which register holds the current instruction after it has been fetched from memory? — Instruction Register (IR)
30. A 'direct addressing mode' for memory-reference instructions means: — The address field of the instruction contains the effective address of the operand.
31. What is a common scenario that triggers an interrupt? — A key being pressed on the keyboard or a disk drive completing a read operation.
32. After fetching an instruction, the CPU decodes it. What happens during the decode phase? — The control unit interprets the instruction to determine the operation and operands.
33. During the 'execute' phase of the instruction cycle, what typically occurs? — The CPU performs the operation specified by the instruction.
34. In the context of interrupts, what is an 'interrupt handler' or 'interrupt service routine' (ISR)? — A special program designed to service the interrupt request.
35. The 'operation code' (opcode) within an instruction code specifies: — The action or operation to be performed by the CPU.
36. The 'indirect addressing mode' for memory-reference instructions means: — The address field of the instruction contains the address of the memory location that holds the effective address of the operand.
37. What does 'memory organization' typically refer to? — The way memory is structured into addressable units and how it's accessed.
38. What determines the speed and efficiency of the 'timing and control' unit? — The clock speed and the complexity of the control logic.
39. Which of the following is a characteristic of 'interrupts' in computer systems? — They allow for asynchronous handling of events from hardware or software.
40. What is the purpose of a 'bus arbitration' mechanism? — To control the flow of data between different units connected by a bus.
41. What is the primary purpose of 'input-output' (I/O) operations in a computer system? — To allow the computer to communicate with the external world.
42. What is the purpose of incrementing the Program Counter (PC) after fetching an instruction? — To point to the next instruction in sequential execution.
43. What is the role of the 'Instruction Register' (IR)? — To hold the current instruction being executed.
44. What is the role of the 'Accumulator' (AC) register in many CPU designs? — To hold the data currently being operated on by the ALU and store the results.
45. What is the primary function of the 'Memory Address Register' (MAR)? — To hold the address of the memory location to be accessed.
46. What is a 'halt' instruction used for? — To stop the execution of the program and the processor.
47. What is the primary role of the 'fetch-decode-execute' cycle? — To define the fundamental operation of a CPU.
48. What is the primary function of the 'timing and control' unit in a computer system? — To generate control signals that coordinate the operations of all other units.
49. What is the purpose of the 'control signals' generated by the control unit? — To direct and synchronize the operations of all other components of the computer.
50. What is the purpose of the 'status flags' or 'condition codes' in a CPU? — To indicate the result of an arithmetic or logical operation (e.g., zero, carry, negative).
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