Central Processing Unit - general register organization, stack organization, instruction formats, addressing modes, RISC and CISC architectures - One Line Questions

1. What is a primary characteristic of RISC (Reduced Instruction Set Computer) architecture? — A small, highly optimized set of instructions
2. What is the 'stack pointer' (SP) in a stack organization? — A register pointing to the next available memory location for a PUSH operation
3. What is a 'stack frame' or 'activation record' in the context of stack organization? — A block of memory on the stack used to store parameters, local variables, and return addresses for a function call.
4. In a stack organization, if a PUSH operation is performed when the stack is full, it results in: — A stack overflow error
5. In a stack organization, the 'POP' operation typically performs which action? — Retrieves and removes the element from the top of the stack
6. What is the main advantage of RISC's fixed-length instruction format? — Simplifies instruction fetching and decoding, aiding pipelining.
7. Which part of the CPU is responsible for fetching, decoding, and executing instructions? — Control Unit (CU)
8. CISC instructions are often designed to: — Reduce the number of instructions needed to perform a task
9. Which addressing mode uses the content of a register plus an offset to find the operand? — Indexed
10. Which addressing mode involves adding an offset to a base register value to determine the operand's address? — Indexed Addressing
11. Which addressing mode is used when the operand is part of the instruction itself? — Immediate Addressing
12. Which of the following is a characteristic of CISC instruction sets? — Variable instruction lengths
13. Which of the following is a characteristic of stack-based virtual machines (e.g., JVM)? — Instructions implicitly operate on the top elements of the stack.
14. What is the main advantage of RISC over CISC in terms of instruction execution? — Simpler instruction decoding and faster execution due to regularity
15. CISC (Complex Instruction Set Computer) architectures typically feature: — Instructions that can perform multiple low-level operations
16. Which type of CPU organization typically uses the fewest registers? — Stack Organization
17. What is a 'zero-address instruction' often associated with? — Stack organization
18. Which addressing mode is often implemented using a combination of a base register and an index register? — Indexed Addressing
19. Which of the following is NOT a common addressing mode? — Parallel
20. Which addressing mode is often used for accessing elements in arrays or tables? — Indexed
21. Which addressing mode uses a register that contains the address of the operand? — Register Indirect Addressing
22. What does 'auto-increment' addressing mode do? — It uses the content of a register as the address and then increments the register.
23. What is a common characteristic of a stack organized computer? — Instructions operate implicitly on the top elements of a stack
24. In a register-memory architecture (common in CISC), what is a typical operation? — Load data from memory to register, perform operation, store result back to memory
25. A key design principle of CISC architecture is to: — Reduce the gap between hardware and high-level language constructs
26. In RISC, the emphasis on simple instructions often leads to: — Increased reliance on the compiler to generate efficient code.
27. RISC processors generally aim to execute most instructions in how many clock cycles? — One clock cycle
28. A 'control unit' in a CPU is primarily responsible for: — Generating control signals to direct the operation of other CPU components.
29. In a stack organization, the 'PUSH' operation typically performs which action? — Adds a new element to the top of the stack
30. Which architecture typically has a larger number of addressing modes? — CISC
31. What is a 'microinstruction' typically associated with? — CISC architecture's complex instruction execution
32. What is the main advantage of using a general register organization? — Increased flexibility and efficiency in instruction execution
33. In a general register organization, which register typically holds the address of the next instruction to be executed? — Program Counter (PC)
34. In a general register organization, a common approach is to use registers as: — Accumulators, index registers, and general-purpose storage
35. What does 'direct addressing' mean in the context of instruction formats? — The instruction contains the memory address of the operand
36. In instruction formats, what does the opcode specify? — The operation to be performed by the CPU
37. What is the 'base register addressing' mode? — The operand address is the sum of the content of a base register and an offset.
38. What is an 'implied' addressing mode? — The operand is implicitly defined by the opcode (e.g., stack)
39. What is 'relative addressing'? — The operand's address is calculated by adding an offset to the Program Counter
40. In a typical instruction format, the 'operand' field specifies: — The address or value of the data to be operated on.
41. In a stack organization, the top of the stack is usually managed by: — The Stack Pointer
42. In a CPU with general register organization, what is the benefit of having multiple registers? — They reduce the need for frequent memory accesses, speeding up computation.
43. In RISC architecture, how are complex operations typically handled? — By combining multiple simple instructions
44. What is the primary objective of the Load/Store architecture found in RISC? — To restrict memory access to only Load and Store instructions
45. In a general register organization, what is the role of the Instruction Register (IR)? — To hold the current instruction being decoded and executed
46. What is the primary goal of CISC architecture? — To reduce the average number of instructions per program by having complex instructions.
47. In CISC, what is the typical role of microprogramming? — To implement the complex instruction set using sequences of simpler micro-operations.
48. What is the purpose of the 'addressing mode' field in an instruction? — To indicate how to locate the operand(s).
49. In a general register organization, what is the primary purpose of using registers? — To hold frequently accessed data and intermediate results for faster processing
50. What is the primary role of the Program Counter (PC) in a CPU, regardless of its organization? — To hold the address of the next instruction to be fetched
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