Input-Output Organization - peripheral devices, I-O interface, asynchronous data transfer, modes of transfer, priority interrupt, DMA, serial communication - One Line Questions

1. Asynchronous data transfer is characterized by: — The sender and receiver using separate clock signals.
2. In I/O-mapped I/O (also known as port-mapped I/O), the CPU uses specific instructions like 'IN' and 'OUT' to: — Access peripheral device registers.
3. Which type of DMA transfer is most efficient for high-speed peripherals? — Burst Mode DMA
4. Which is a common application of serial communication? — Connecting a keyboard or mouse to a computer.
5. When an interrupt occurs, what is the typical first step performed by the CPU? — Save the current program counter and processor status.
6. What does DMA stand for in computer architecture? — Direct Memory Access
7. Which mechanism allows multiple devices to request an interrupt, and the system prioritizes them? — Priority Interrupt Controller
8. Interrupt-Initiated I/O allows a peripheral device to: — Signal the CPU when it is ready for data transfer.
9. When an I/O device needs attention from the CPU, it typically uses a(n): — Interrupt signal.
10. What is a key characteristic of synchronous serial communication? — A shared clock signal synchronizes data transmission between sender and receiver.
11. What is a common use case for Direct Memory Access (DMA) in modern computers? — Transferring data from a hard drive to RAM.
12. RS-232 is a standard primarily used for: — Connecting peripherals like modems and terminals (often asynchronous).
13. What is the primary advantage of serial communication over parallel communication for long distances? — Fewer wires are required, reducing cost and complexity.
14. Which of the following best describes 'memory-mapped I/O'? — I/O devices are accessed using the same address space and instructions as memory.
15. What is a common peripheral device that utilizes serial communication? — External Modem
16. Which component is essential for DMA to function? — DMA Controller
17. Which mode of transfer involves the CPU actively checking the status of the I/O device before transferring data? — Programmed I/O
18. What is the primary advantage of using a Priority Interrupt Controller? — It allows the CPU to focus on critical tasks by handling interrupts in order of importance.
19. Which of the following is a primary characteristic of a peripheral device in a computer system? — It allows the computer to interact with the external environment.
20. What is a key disadvantage of Programmed I/O? — It is inefficient because the CPU spends a lot of time polling.
21. What is the primary advantage of using DMA over Programmed I/O for large data transfers? — Reduced CPU overhead, allowing the CPU to perform other tasks concurrently.
22. What is the main difference between memory-mapped I/O and I/O-mapped I/O? — Memory-mapped I/O shares the same address space as memory, while I/O-mapped I/O uses a separate address space.
23. In a DMA controller, what information must be provided to initiate a transfer? — The starting memory address, the number of words to transfer, and the direction of transfer (read/write).
24. In a daisy-chain priority interrupt system, the interrupt request lines are: — Serially connected, with the request passing from one device to the next.
25. Which term describes the process by which an I/O device signals to the CPU that it requires attention? — Interrupt
26. Which of the following is a type of input device? — Keyboard
27. Which of the following is NOT a mode of data transfer between CPU and I/O devices? — Cache Memory Access
28. Which type of I/O transfer is characterized by the CPU issuing a command to the I/O device and then waiting for it to complete the operation without further CPU involvement until completion? — Programmed I/O
29. Which protocol is commonly used for synchronous serial communication? — SPI
30. Which interface is designed for high-speed, general-purpose serial communication and connects many types of peripherals? — USB (Universal Serial Bus)
31. Which of the following is a type of output device? — Plotter
32. What is the fundamental difference between serial and parallel data transfer? — Serial uses one wire for data, parallel uses multiple wires.
33. Which statement best describes the 'Bus Arbitration' process? — A mechanism to control which device (CPU, DMA controller) gets access to the system bus at any given time.
34. A 'handshake' mechanism in I/O transfer typically involves: — Control signals exchanged between the I/O device and the CPU/interface to coordinate data transfer.
35. In DMA transfer, what is 'cycle stealing'? — The DMA controller temporarily taking control of the system bus from the CPU to transfer data.
36. In a priority interrupt system, what happens when a higher-priority interrupt occurs while a lower-priority interrupt is being serviced? — The CPU suspends the lower-priority ISR and services the higher-priority interrupt.
37. In Programmed I/O, who is responsible for initiating and controlling the data transfer? — The Central Processing Unit (CPU).
38. In the context of I/O interrupts, what is 'interrupt masking'? — The process of disabling interrupts temporarily.
39. What is interrupt latency? — The time from when an interrupt is generated to when the ISR begins execution.
40. The main benefit of Direct Memory Access (DMA) is: — To reduce the burden on the CPU by allowing peripherals to transfer data directly to/from memory.
41. What is the main function of an I/O device controller? — To act as an intermediary between the I/O device and the system bus, handling device-specific protocols and data formatting.
42. What is the role of the bus controller in I/O operations? — To manage the flow of data and control signals between the CPU, memory, and I/O devices on the system bus.
43. What is the purpose of a 'parity bit' in some serial communication protocols? — To provide a simple mechanism for error detection.
44. What is the main purpose of an I/O interface? — To manage the flow of data between the CPU and peripheral devices.
45. In serial communication, what is the role of a UART (Universal Asynchronous Receiver/Transmitter)? — To convert parallel data from the CPU to serial data for transmission and vice versa.
46. What is the purpose of an Interrupt Service Routine (ISR)? — To handle the specific event that caused the interrupt.
47. In asynchronous data transfer, what is the function of control lines like 'Strobe' and 'Ready'? — To synchronize the data transfer between sender and receiver.
48. Serial communication involves: — Transferring bits one after another over a single line.
49. In Burst Mode DMA, the DMA controller: — Transfers a block of data continuously without interruption from the CPU.
50. Which of the following is an example of a parallel interface? — Centronics (for printers)
All One Line Questions
E-Book Input-Output Organization - peripheral devices, I-O interface, asynchronous data transfer, modes of transfer, priority interrupt, DMA, serial communication Online Test Input-Output Organization - peripheral devices, I-O interface, asynchronous data transfer, modes of transfer, priority interrupt, DMA, serial communication Question Bank Input-Output Organization - peripheral devices, I-O interface, asynchronous data transfer, modes of transfer, priority interrupt, DMA, serial communication